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M80 Hardware Design

M80_HD_V1.0 - 50 -

3.9.4. UART Application

The reference design of 3.3V level match is shown as below. 1K resistors among the following

diagram are used to decrease the output voltage of MCU/ARM.

MCU/ARM

/TXD

/RXD

TXD

RXD

RTS

CTS

DTR

/RTS

/CTS

GPIO

EINT

voltage level: 3.3V

GND

VBAT

GPIO

STATUS

MODULE

Figure 24: 3.3V level match circuit

Note: The above reference design is also suitable for 3V system.

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Sim2 M80 Spezifikationen Seite 50